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 CX74005
VGA + I/Q Demodulator Rx ASIC for Portable Phone Applications
The CX74005 Application-Specific Integrated Circuit (ASIC) is a Variable Gain Amplifier (VGA) and I/Q demodulator, intended for use in Code Division Multiple Access (CDMA) portable phones in both cellular and Personal Communications System (PCS) bands. As a trimode IC, it can be used in CDMA mode or Advanced Mobile Phone System (AMPS) mode. The device incorporates a VGA and the In-Phase and Quadrature (I/Q) demodulator stages. The intermediate frequencies (IF) are combined through separate buffers at the input of the VGA depending on the selected mode. The VGA has a gain control range greater than 90 dB. There are two Very High Frequency (VHF) oscillators that operate with external tank circuits. They provide signals to the Local Oscillator (LO) for the I/Q demodulator in the cellular and PCS bands. The noise figure, gain, and third order Input Intercept Point (IIP3) of the CX74005 are optimized to meet the system requirements for AMPS and CDMA modes as per TIA/EIA-98-B, ANSI J-STD-018 (PCS), CDMA2000. Employing silicon bipolar technology, the ASIC is designed for high performance, a high level of integration and low cost. The device package and pinout are shown in Figure 1. A block diagram of the CX74005 is shown in Figure 2.
GND GND
Features
* Supports CDMA/AMPS/PCS1900 modes * Three battery cell operation (2.7 V < VCC < 3.3 V). * IF inputs and I/Q outputs * On-chip 100 to 640 MHz oscillators * Low power operation: <25 mA * 32-pin Land Grid Array (LGA) 5 x 5 mm package
Applications
* Tri-mode handsets * CDMA and AMPS modes in the cellular band: - AMPS - CDMA-US - CDMA-Japan * CDMA mode in the PCS band: - PCS-US - PCS-Korea
SIF
Q+
28
31
30
29
27
Q-
I+
I-
32
26
25 24 23 22 21 20 19 18 17
GND FM/CDMA CELL/PCS VCO_VCC VCO_GND CELL_TANK1CELL_TANK1+ NC PCS_TANK-
1 2 3 4 5 6 7 8 9
GND VGA_AMPS NC VGA_PCS_IN+ VGA_PCS_INVGA_CDMA_IN+ VGA_CDMA_INIF_VCC VGA_GC
10
12
13
14
15
PCS_TANK+
DIV2/DIV4
IF_GND
SLEEP
PLL+
GND
PLL-
16
11
CNXT044
Figure 1. Rx ASIC Pinout - 32-Pin LGA Package (Top View)
Data Sheet
Conexant - Preliminary
Proprietary Information and Specifications Are Subject to Change
Doc. No. 101252A March 13, 2001
CX74005
Rx ASIC
2
6,7
VGA_CDMA
2
19,20
CX74005 Rx ASIC
29
I
30
VGA_PCS
21,22
2
/ 2,4
11
DIV2/DIV4
VGA_AMPS
24
27
Q
28 16
2
3
17
9,10
2
12,13
2
FM/CDMA
CELL/PCS
VGA_GC
SLEEP
PLL
C1431
Figure 2. CX74005 Rx ASIC Block Diagram
Technical Description
Variable Gain Amplifier (VGA). The high dynamic range required by CDMA handsets is achieved by the VGA, which is common to all modes. The VGA has a minimum dynamic range of 90 dB with a control voltage of 0.5 to 2.5 volts. The appropriate signal path is switched internal to the device. This eliminates off-chip switching needed to operate this common VGA in cellular AMPS, CDMA, and PCS modes. I/Q Demodulator. The local oscillator signals are generated onchip. The I/Q demodulator is internally connected to the VGA output. It is designed to have a very low amplitude and phase imbalance. The I and Q outputs are differential. The DC offsets between the differential outputs and between I and Q channels are designed to be extremely low to facilitate compatibility with baseband interfaces. VHF Oscillators. There are two on-chip oscillators, one for the cellular and one for the PCS bands. These Voltage Controlled Oscillators (VCOs) work with external tank circuits and varactor diodes. The outputs of the differential oscillators are buffered and the output is used to drive the prescaler of an external Phase Locked Loop (PLL). The VCOs typically operate at twice the IF frequency and can operate at up to four times the IF frequency.
2
The local oscillators for the I/Q demodulators are derived by an on-chip frequency divider. The logic signal to select the divider ratio (2 or 4) is available on Pin 11 (DIV2/DIV4). Mode Control. The operation of the chip is controlled by signals at Pin 3 (CELL/PCS), Pin 2 (FM/CDMA), Pin 16 (SLEEP), and the DIV2/DIV4 select commands at Pin 11. All the switching is done internally. The supply voltage should be present at all the VCC pins for normal operation. The signals needed to select each mode is shown in Table 1.
Electrical and Mechanical Specifications
Signal pin assignments and functional pin descriptions are described in Table 2. The absolute maximum ratings of the CX74005 are provided in Table 3. The recommended operating conditions are specified in Table 4. Electrical specifications are provided in Table 5. Typical performance characteristics are illustrated in Figures 3 through 32. Figure 33 provides the package dimensions for the 32-pin LGA and tape and reel dimensions are shown in Figure 34.
Conexant - Preliminary
Proprietary Information and Specifications Are Subject to Change
101252A March 13, 2001
Rx ASIC
CX74005
ESD Sensitivity
The CX74005 is a Class 1 device. The following extreme Electrostatic Discharge (ESD) precautions are required according to the Human Body Model (HBM): * * Protective outer garments. Handle device in ESD safeguarded work area.
* *
Transport device in ESD shielded containers. Monitor and test all ESD protection equipment.
The HBM ESD withstand threshold value, with respect to ground, is 1.5 kV. The HBM ESD withstand threshold value, with respect to VDD (the positive power supply terminal) is also 1.5 kV.
Table 1. Mode Control Select Signal Switching Pin
3 (CELL/PCS) 2 (FM/CDMA) 16 (SLEEP) 0 = Low 1 = High x = N/A Note: DIV 2 is used in the evaluation board. Key: 0 0 1
AMPS
CDMA
0 1 1 1 x 1
PCS
101252A March 13, 2001
Conexant - Preliminary
Proprietary Information and Specifications Are Subject to Change
3
CX74005
Rx ASIC
Table 2. CX74005 Pin Assignments and Signal Descriptions Pin #
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 GND FM/CDMA CELL/PCS VCO_VCC VCO_GND CELL_TANK1- CELL_TANK_1+ NC PCS_TANK- PCS_TANK+ DIV2/DIV4 PLL+ PLL- GND IF_GND SLEEP VGA_GC IF_VCC VGA_CDMA_IN- VGA_CDMA_IN+ VGA_PCS_INVGA_PCS_IN+ GND VGA_AMPS GND GND Q- Q+ I- I+ GND GND
Name
Ground Cellular band mode select: 0 = AMPS, 1 = CDMA Band select: 0 = Cellular; 1 = PCS
Description
Voltage supply pin to the VCO buffers. A bypass capacitor should be placed close to the device from pin 4 to pin 5. The trace should be short and connected immediately to the ground plane for best performance. Ground return from the VCO buffers. Differential tank connection for the cellular band VCO. Care should be taken during the layout of the external tank circuit to prevent parasitic oscillations. Differential tank connection for the cellular band VCO. Care should be taken during the layout of the external tank circuit to prevent parasitic oscillations. No connection Differential tank connection for the PCS band VCO. Care should be taken during the layout of the external tank circuit to prevent parasitic oscillations. Differential tank connection for the PCS band VCO. Care should be taken during the layout of the external tank circuit to prevent parasitic oscillations. Selects the divide ratio of the VCO to the LO port of the I/Q demodulator: 0 = divide by 2, 1 = divide by 4. Differential buffered VCO output Differential buffered VCO output Ground Ground Activates sleep mode: 0 = Sleep, 1 = Enable The VGA gain control signal. A DC control voltage should be applied to this pin to vary the gain of the VGA. Voltage supply to VGA and I/Q demodulator stages. Supply should be well regulated and bypassed to prevent modulation of the signal by the supply ripple. CDMA differential VGA input CDMA differential VGA input PCS differential VGA input. PCS differential VGA input. Ground AMPS VGA input Ground Ground Q channel differential output Q channel differential output I channel differential output I channel differential output Ground Ground
4
Conexant - Preliminary
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101252A March 13, 2001
Rx ASIC
CX74005
Table 3. Absolute Maximum Ratings Parameter
Supply voltage (VCC) Input voltage range Power dissipation Ambient operating temperature Storage temperature -30 -40
Minimum
-0.3 -0.3
Maximum
+5.5 VCC 600 +80 +125
Units
V V mW C C
Table 4. Recommended Operating Conditions Parameter
Supply voltage (VCC) Operating temperature Impedance of logic inputs Logic 0 Logic 1 0.0 VCC - 0.5
Minimum
2.7 -30
Typical
3.0 +25 50
Maximum
3.3 +80 0.5 VCC
Units
V C k V V
Table 5. CX74005 Rx ASIC Electrical Specifications (1 of 2)
(TA = 25 C, VCC = 3.0 V)
Parameter
Frequency range Input impedance: AMPS input (single ended) CDMA input (differential) PCS input (differential) Voltage gain: Maximum (AMPS) Minimum (AMPS) Maximum (CDMA) Minimum (CDMA) Maximum (PCS) Minimum (PCS) Voltage gain slope Voltage gain slope linearity (over any 6 dB segment) VGA + I/Q IIP3: @ Maximum voltage gain (AMPS) @ Maximum voltage gain (CDMA) @ Maximum voltage gain (PCS) Input 1 dB compression @ minimum gain VGA + I/Q noise figure: @ Maximum gain (AMPS) @ Maximum gain (CDMA) @ Maximum gain (PCS) @ Minimum gain
Test Condition
Rx VGA - I/Q Demodulator
Min
50
Typical
Max
300
Units
MHz dB dB dB dB dB dB dB/V
1000 1000 1000 VGA_GC (V) 2.5 0.5 2.5 0.5 2.5 0.5 -3 VGA_GC (V) 2.5 2.5 2.5 -50.5 -48.5 -47 -10 8 5.5 5.5 -50 55 -45 52.5 -46 50 -46 49 +3
dB dBm dBm dBm dBm dB dB dB dB
101252A March 13, 2001
Conexant - Preliminary
Proprietary Information and Specifications Are Subject to Change
5
CX74005
Rx ASIC
Table 5. CX74005 Rx ASIC Electrical Specifications (2 of 2)
(TA = 25 C, VCC = 3.0 V)
Parameter
Output level: AMPS CDMA PCS Maximum output level Gain variation over frequency: AMPS (0.1-12.2 kHz) CDMA (1-630 kHz) PCS (1-630 kHz) I+, I-, and Q+, Q- DC offset I/Q gain mismatch I/Q phase mismatch Output load impedance (differential) Output impedance (differential) Total supply current (includes I/Q mixers, LO buffers, and dividers) Oscillator Frequency range Phase noise (fc = 200 MHz, unloaded Q = 20) @ 100 kHz offset Second harmonic distortion (application dependent) Output level to PLL (differential) Output impedance to PLL (differential) Total supply current (including external tank circuits)
Test Condition
Rx VGA - I/Q Demodulator (continued)
Min
Typical
Max
Units
2.75 2.50 2.50 1.4 0.1 0.1 0.1 1 0.2 2 10 500 15 100 -117 -30 300 300 10 -26 640 0.3 0.3 0.3 6 0.3 4
mVrms mVrms mVrms Vp-p dB dB dB mVrms dB deg k mA MHz dBc/Hz dBc mVp-p mA
6
Conexant - Preliminary
Proprietary Information and Specifications Are Subject to Change
101252A March 13, 2001
Rx ASIC
CX74005
10
60 50
0
40
-10 IIP3-3.0V IIP3 (dBm) -20 OIP3-3.0V IIP3-2.7V OIP3-2.7V -30 IIP3-3.3V OIP3-3.3V -40
30 Voltage Gain (dB) 20 10 0 -10 -20 -30 2.7V 3.0V 3.3V
-50
-40
-60 0 0.5 1 1.5 Control Voltage (Volts) 2 2.5 3
-50 0 0.5 1 1.5 2 2.5 3 Control Voltage (Volts)
Figure 3. AMPS IIP3 and OIP3 vs. Control Voltage @ 25 C
Figure 4. AMPS VGA vs. Control Voltage @ 25 C
10
65 55
0 45 -10 IIP3-2.7V OIP3-2.7V -20 IIP3-3.0V -30 OIP3-3.0V IIP3-3.3V -40 OIP3-3.3V Voltage Gain (dB) 35 25 15 5 -5 -15 -50 -25 -60 0 0.5 1 1.5 2 2.5 3 -35 0 0.5 1 1.5 2 2.5 3 2.7V 3.0V 3.3V
IIP3 (dBm)
Control Voltage (Volts)
Control Voltage (Volts)
Figure 5. AMPS IIP3 and OIP3 @ -30 C
Figure 6. AMPS VGA vs. Control Voltage @ -30 C
10 5 0 -5 IIP3-2.7V OIP3-2.7V IIP3-3.0V -25 OIP3-3.0V -30 IIP3-3.3V -35 -40 -45 -50 -55 0 0.5 1 1.5 2 2.5 3
70 60 50 40 Voltage Gain (dB) 30 20 10 0 -10 -20 -30 -40 -50 0 0.5 1 1.5 2 2.5 3 2.7V 3.0V 3.3V
-10 -15 IIP3 (dBm) -20
Control Voltage (Volts)
Control Votlage (Volts)
Figure 7. AMPS IIP3 and OIP3 vs. Control Voltage @ 85 C
Figure 8. AMPS VGA vs. Control Voltage @ 85 C
101252A March 13, 2001
Conexant - Preliminary
Proprietary Information and Specifications Are Subject to Change
7
CX74005
Rx ASIC
12
60
11
55
50
10 NF (dB)
2.7V 3.0V
45
2. 7V 3. 0V 3. 3V 40
9
3.3V
8
35
7
2 2.1 2.2 2.3 2.4 2.5 2.6
30 2 2. 1 2. 2 2. 3 2. 4 2. 5 2. 6
Control Voltage (Volts)
C ont r ol V ol t a ge ( V ol t s )
Figure 9. AMPS Noise Figure vs. Control Voltage @ 25 C
Figure 10. AMPS Gain Noise Figure vs. Control Voltage @ 25 C
11
60
10.5
55
Voltage Gain (dB)
10 NF (dB)
50
9.5
45
9
40
8.5
35
8 2 2.1 2.2 2.3 Control Voltage (Volts) 2.4 2.5 2.6
30 2 2.1 2.2 2.3 Control Voltage (Volts) 2.4 2.5 2.6
Figure 11. AMPS VGA Noise Figure vs. Control Voltage @ 85 C at VCC=3 Volts
Figure 12. AMPS VGA vs. Control Voltage @ 85 C
10
70 60
0
50 40 Voltage Gain (dB)
-10 IIP3 (dBm)
IIP3-2.7V OIP3-2.7V IIP3-3.0V
30 20 10 0 -10 -20 2.7V 3.0V 3.3V
-20 OIP3-3.0V IIP3-3.3V -30 OIP3-3.3V
-40
-30 -40
-50 0.5 1 1.5 2 2.5 3 Control Voltage (Volts)
-50 0.5 1 1.5 2 2.5 3
Control Voltage (Volts)
Figure 13. CDMA IIP3 vs. Control Voltage @ 25 C
Figure 14. CDMA Gain vs. Control Voltage @ 25 C
8
Conexant - Preliminary
Proprietary Information and Specifications Are Subject to Change
101252A March 13, 2001
Rx ASIC
CX74005
65
5
55 45
-5
35
IIP3-3.0V IIP3-3.3V
-15 IIP3 (dBm)
Voltage Gain (dB)
IIP3-2.7V
25 15 5 -5 -15 -25 2.7V 3.0V 3.3V
-25
OIP3-2.7V OIP3-3.0V
-35
OIP3-3.3V
-45
-35 -45
-55 0.4 0.85 1.3 1.75 2.2 2.65
-55 0.4 0.85 1.3 1.75 2.2 2.65
Control Voltage (Volts)
Control Voltage (Vlts)
Figure 15. CDMA IIP3 and OIP3 vs. Control Voltage @ -30 C
Figure 16. CDMA VGA vs. Control Voltage @ -30 C
65
10
55 45
0
35
OIP3-2.7V OIP3-3.0V
-10 IIP3 (dBm)
Votlage Gain (dB)
IIP3-2.7V
25 15 5 -5 -15 -25 2.7V 3.0V 3.3V
-20
IIP3-3.0V IIP3-3.3V
-30
OIP3-3.3V
-40
-35 -45
-50 0 0.5 1 1.5 2 2.5 3
-55 0 0.5 1 1.5 2 2.5 3
Control Voltage (Volts)
Control Voltage (Volts)
Figure 17. CDMA IIP3 and OIP3 vs. Control Voltage @ 85 C
Figure 18. CDMA VGA vs. Control Voltage @ 85 C
13 12 11
55
50
45
Voltage Gain (dB)
10
NF (dB)
9 8 7 6 5 4 2 2.1 2.2 2.3 2.4 2.5 2.6
2.7V 3.0V 3.3V
40
2.7V 3.0V
35
3.3V
30
25
20 2 2.1 2.2 2.3 2.4 2.5 2.6
Control Voltage (Volts)
Control Voltage (Volts)
Figure 19. CDMA Noise Figure vs. Control Voltage @ 25 C
Figure 20. CDMA VGA vs. Control Voltage @ 25 C
101252A March 13, 2001
Conexant - Preliminary
Proprietary Information and Specifications Are Subject to Change
9
CX74005
Rx ASIC
13
55
12
50
11
NF (dB)
10
Voltage Gain (dB)
2 2.1 2.2 2.3 Control Voltage (Volts) 2.4 2.5 2.6
45
40
9
8
35
7
30
6
25 2 2.1 2.2 2.3
Control Voltage (Volts)
2.4
2.5
2.6
Figure 21. CDMA VGA Noise Figure vs. Control Voltage @ 85 C
Figure 22. CDMA VGA vs. Control Voltage @ 85 C
10
50 40 30
0
OIP3-2.7V -20 IIP3-3.0V OIP3-3.0V -30 IIP3-3.3V
Voltage Gain (dB)
-10 IIP3 (dBm)
IIP3-2.7V
20 10 0 -10 -20 2.7V 3.0V 3.3V
-40
-30 -40
-50 0 0.5 1 1.5 2 2.5 3 Control Voltage (Volts)
-50 0 0.5 1 1.5 2 2.5 3
Control Voltage (Volts)
Figure 23. PCS IIP3 and OIP3 vs. Control Voltage @ 25 C7
Figure 24. PCS VGA vs. Control Voltage @ 25 C
10
55
0 -10
IIP3 (dBm)
45 35
IIP3-2.7v OIP3-2.7v
Voltage Gain (dB)
25 15 5 -5 -15 -25 2.7V 3.0V 3.3V
-20 -30 -40 -50 -60 0 0.5 1 1.5 2 2.5 3
IIP3-3.0v OIP3-3.0v IIP3-3.3V OIP3-3.3V
-35 -45 -55 0 0.5 1 1.5 2 2.5 3
Control Voltage (Volts)
Control Votlage (Volts)
Figure 25. PCS IIP3 vs. Control Voltage @ -30 C
Figure 26. PCS VGA vs. Control Voltage @ -30 C
10
Conexant - Preliminary
Proprietary Information and Specifications Are Subject to Change
101252A March 13, 2001
Rx ASIC
CX74005
15
60 50
5 40 -5 30 IIP3-2.7V Voltage Gain (dB) OIP3-2.7V -15 IIP3-3.0V -25 OIP3-3.0V IIP3-3.3V -35 OIP3-3.3V -20 -30 -45 -40 -55 0 0.5 1 1.5 2 2.5 3 -50 0.5 1 1.5 2 2.5 3 20 10 0 -10 2.7V 3.0V 3.3V
IIP3 (dBm)
Control Voltage (Volts)
Control Voltage (Volts)
Figure 27. PCS IIP3 and OIP3 vs. Control Voltage @ 85 C
Figure 28. PCS VGA vs. Control Voltage @ 85 C
55
12 11 10 9 NF (dB) 2.7V 8 7 6 5 4 2 2.1 2.2 2.3 2.4 2.5 2.6 2.7 3.0V 3.3V
50
45 Voltage Gain (dB)
40
2.7V 3.0V 3.3V
35
30
25
20 2 2.1 2.2 2.3 2.4 2.5 2.6 2.7 Control Voltage (Volts)
Control Voltage (Volts)
Figure 29. PCS Noise Figure vs. Control Voltage @ 25 C
Figure 30. PCS VGA vs. Control Voltage @ 25 C
12
55
11
50
10
Voltage Gain (dB)
45
NF (dB)
9
40
8
35
7
30
6
25
5 2 2.1 2.2 2.3 2.4 2.5 2.6 2.7
20 2 2.1 2.2 2.3 2.4 2.5 2.6 2.7
Contrl Voltage (Volts)
Control Voltage (Volts)
Figure 31. PCS VGA vs. Control Voltage @ 85 C
Figure 32. PCS VGA vs. Control Voltage @ 85 C
101252A March 13, 2001
Conexant - Preliminary
Proprietary Information and Specifications Are Subject to Change
11
CX74005
Rx ASIC
5.04 0.05
To Metal Pad Edge
2.480
2.350
Solder Mask
Pin #1
0.300
0.150 Pin #1 mark
Pin #1
Exposed Metal
0.500
2.350
Solder Mask
5.04 0.05
Exposed Metal
4.200
To Metal Pad Edge
0.38 0.05
2.480
0.040 Ref. 0.300 0.02 0.400 0.05 0.500 Package Edge Detail A 2.000
Mold
1.20 0.10
Substrate
0.30 0.05
All measurements are in millimeters
C1285
Figure 33. Rx ASIC Package Dimensions - 32-Pin LGA Package
8.00 0.10 4.00 0.10 1.50 0.10 1.75 0.10
5.50 0.10
1.50 0.25
12.00 +0.30/-0.10
0.292 0.02
Notes: 1. 2. 3. 4. 5.
5o maximum
Carrier tape material: black conductive polycarbonate Cover tape material: transparent conductive PSA Cover tape size: 9.3 mm width Tolerance: .XX = 0.10 All measurements are in millimeters
8o maximum 1.78 0.10 5.51 0.10 5.49 0.10
C1327
Figure 34. 32-Pin LGA Tape and Reel Dimensions
12
Conexant - Preliminary
Proprietary Information and Specifications Are Subject to Change
101252A March 13, 2001
Rx ASIC
CX74005
Ordering Information
Model Name
Rx ASIC
Manufacturing Part Number
CX74005
Product Revision
(c) 2001, 2002, Skyworks Solutions, Inc. All Rights Reserved. Information in this document is provided in connection with Skyworks Solutions, Inc. ("Skyworks") products. These materials are provided by Skyworks as a service to its customers and may be used for informational purposes only. Skyworks assumes no responsibility for errors or omissions in these materials. Skyworks may make changes to its products, specifications and product descriptions at any time, without notice. Skyworks makes no commitment to update the information and shall have no responsibility whatsoever for conflicts, incompatibilities, or other difficulties arising from future changes to its products and product descriptions. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as may be provided in Skyworks' Terms and Conditions of Sale for such products, Skyworks assumes no liability whatsoever. THESE MATERIALS ARE PROVIDED "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED, RELATING TO SALE AND/OR USE OF SKYWORKSTM PRODUCTS INCLUDING WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, PERFORMANCE, QUALITY OR NON-INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. SKYWORKS FURTHER DOES NOT WARRANT THE ACCURACY OR COMPLETENESS OF THE INFORMATION, TEXT, GRAPHICS OR OTHER ITEMS CONTAINED WITHIN THESE MATERIALS. SKYWORKS SHALL NOT BE LIABLE FOR ANY SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, INCLUDING WITHOUT LIMITATION, LOST REVENUES OR LOST PROFITS THAT MAY RESULT FROM THE USE OF THESE MATERIALS. SkyworksTM products are not intended for use in medical, lifesaving or life-sustaining applications. Skyworks' customers using or selling SkyworksTM products for use in such applications do so at their own risk and agree to fully indemnify Skyworks for any damages resulting from such improper use or sale. The following are trademarks of Skyworks Solutions, Inc.: SkyworksTM, the Skyworks symbol, and "Breakthrough Simplicity"TM. Product names or services listed in this publication are for identification purposes only, and may be trademarks of third parties. Third-party brands and names are the property of their respective owners. Additional information, posted at www.skyworksinc.com, is incorporated by reference.
101252A March 13, 2001
Conexant - Preliminary
Proprietary Information and Specifications Are Subject to Change
13
General Information: Skyworks Solutions, Inc. 4311 Jamboree Rd. Newport Beach, CA 92660-3007 www.skyworksinc.com


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